systransis Team

Name:

Markus Montigel

Functions:

CEO, Chairman of the Board

Contact:

Tel: +41 41 727 21 31

Education:

Masters of Computer Science ETH, 1989
Ph.D. ETH, 1994

Award:

Medal for excellent Doctoral Thesis of ETH Zurich (1994)

Experiences:

  • Founder, CEO and President, systransis Ltd.
  • Assistant Professor for Computer Science, Universitity of New Orleans.
  • Lecturer of Computer Science and Student Advisor, College Studies for Telecommunication and Media St. Pölten, Austria.
  • Project Manager and Manager System Engineering, Transport Automation Division, Alcatel Austria.
  • Assistant Lecturer Institute for Traffic Planning and Transport Systems, ETH Zurich.

Current projects:

  • Tunnel Automatic Gotthard TAG, Components for the Train Traffic Control System Gotthard Base Tunnel, Switzerland.
  • Automatic Functions AF, Train Traffic Control System Lötschberg Base Tunnel, Switzerland.

Successfully
completed projects:

  • Automatic Functions AF, Minimal Lineside Signalling Train Traffic Control System Lötschberg Base Tunnel, Switzerland.
  • AdmiRail® - Intelligent platform concept for Train Traffic Control and Automation Systems of the future.
  • AdmiTest Testing Framework - Sophisticated regression-capable Blackbox Testing of heterogeneous systems.
  • Automated Testtooling in an Environment of heterogeneous systems.
  • IT support for PULS 90 of SBB
  • Networking and Integration of Hot Box/Hot Wheel Wayside Detectors and other Automatic Train Inspection Equipment of SBB AG.
  • Software concepts, design and architecture for track vehicles with ETCS/ERTMS equipment of Bombardier Transportation.
  • Assessment communication system Interlocking (Bombardier).
  • Assessment communication system Transrapid (Siemens).
  • Controller for Test Systems of Space Shuttles with the Spreadsheet language Wizcell (NASA).
  • Benchmark Engine for the Ship Industry (Resurgence Inc., Lloyds).
  • WebRide Webbased Diagnostic Engine, remote diagnostic system for Electronic Interlocking (Alcatel).
  • Assessment Interface Interlocking RBC for ETCS Level 2 railway Sursee-Zofingen of SBB.
  • Redesign System Architecture Electronic Interlocking (Alcatel).
  • Safe Transmission System for Interlocking applications.
  • Dissertation: Modelling and Simulation of Railway Applications with Petri nets.


iso

Swiss TS_ISO

swiss made software

 

© 2012 systransis Ltd